The present invention relates to semiconductor packaging technology, and more particularly to flip-chip and related chip scale semiconductor packaging technology.
A common task in the manufacture of microelectronic components involves the manufacture of single chip or multi-chip modules having input/output pins which are inserted into a substrate. The input/output pins provide the needed electrical connections to the integrated circuit chip or chips, which are subsequently connected to the substrate or carrier. In other presently known manufacturing processes, a chip is soldered directly to a printed circuit board. With either process, solder flux compositions have typically been applied to the pins in order to connect the component to the selected substrate, for instance, the printed circuit board.
As electronic devices become smaller and more dense, greater demand is placed on the ability to establish efficient, reliable interconnections from a semiconductor chip to a substrate. There are at least three well-known methods for interconnecting chips to substrate. Those three methods are (a) face-up wire bonding, (b) face-up tape-automated bonding, and (c) the flip-chip method. Among these three methods, the flip-chip methods is frequently chosen as a preferred method of semiconductor packaging for it allows the interconnection of high density devices having a large number of input and output paths. Also, the flip-chip method provides short conductivity leads from the chip to the substrate, a small device footprint, low inductance, high frequency capabilities, and good noise control.
As shown in FIG. 1B, a flip-chip is a semiconductor chip 10 that is mounted onto a substrate 18 with the surface of the chip 10 facing the substrate 18. Although several materials may be used to form an interconnection between the flip-chip 10 and substrate 18, solder is one of the more commonly employed materials for flip-chip bumps 12. In the solder interconnect process termed xe2x80x9ccontrolled-collapse chip connection xe2x80x9c(C4)xe2x80x9d, the solder bumps 12 are deposited on a wettable conductive terminal on the semiconductor chip 10. Then the semiconductor chip 10 is aligned with the substrate 18 so that the solder bumps 12 are directly over solder wettable terminals 20 of the substrate 18. The solder bump are then tacked to the substrate 18 and reflowed in the presence of solder flux, creating an electrical and mechanical connection from the chip 10 to the substrate 18 as well as a path for heat dissipation.
Typically, the chip-substrate joining process involves application of a flux on the chip 10 and/or the solder wettable terminals 20 of the substrate 18. As shown in FIG. 1A, flux 16 is manually brushed over the entire surface of the semiconductor chip 10 by a brush 14, including the previously formed flip-chip bumps 12. For the purpose of increasing cleaning efficiency, Low-solid fluxes, or xe2x80x9cno-clean fluxesxe2x80x9d, which contain small amounts, e.g., about 1% to 5% by weight of solids (activator and vehicle) and the remainder liquid solvent, such as isopropyl alcohol, are being increasingly used by circuit board manufacturers in an effort to eliminate the need to clean the circuit boards after soldering. Because of the small amount of solids within no-clean fluxes, the amount of residue left on the board is significantly reduced, as compared to the amount of residue remaining after the use of conventional rosin-based fluxes. These low-solid, no clean fluxes are particularly attractive because, as their name implies, flux cleaning of the circuit boards after soldering is not required, which results in a significant cost savings.
After flux application, the chip 10 is aligned to the substrate 18 having the flip-chip pads 20 on its surface, which is further facilitated by the flux viscosity and tackiness. The chip-substrate assembly is then subjected to solder reflow in a furnace under nitrogen or forming gas. In the subsequent cooling cycle of the thermal profile for joining, the solder hardens and at the same time, the residual flux vapors deposit on the various exposed surfaces.
Under the high temperature solder reflow environment, the flux is mostly removed by thermal decomposition to volatile species but a small fraction of these thermally activated species undergoes crosslinking reactions, resulting in resinous/carbonaceous byproducts as residue 22 (FIG. 1B) on the C4 connections and all other surfaces on the chip 10 and the substrate 18 that are exposed to the volatile species during the solder reflow professing. The flux residue 22 must be removed from all critical surfaces prior to further operation, otherwise it can lead to function failure during long term use due to stress corrosion during the exposure to temperature and humidity environment. Further need for removal of flux residue is dictated by the observation that if any residual film of flux residue remains on the substrate or device surface material, it causes detriment to the adhesion of C4 epoxy encapsulant or underfill which is required for enhanced C4 fatigue life and C4 reliability during production on-off cycles.
Therefore, there exists a need for improved and production worthy methodology which reduces flux residue from all critical surfaces.
These and other needs are met by the present invention which provides a method for depositing flux on a substrate having a plurality of conductive terminals to reduce flux residue from all critical areas of a chip surface. The present invention also provides an apparatus for dispensing flux on a substrate having conductive terminals to reduce flux residue from all critical areas of a chip surface.
The method in accordance with the present invention includes positioning a substrate having a plurality of conductive terminals on a predetermined location. Subsequently, flux having a viscosity range between about 10 centipoises and about 150 centipoises is controllably sprayed on the substrate at a valve pressure range between about 1.5 psi and about 30 psi to deposit the flux on the plurality of conductive terminals. In certain embodiments of the present invention, a flux dispenser equipped with a flux needle and containing the flux is used to deposit the flux on the substrate and the conductive terminals thereon.
The apparatus in accordance with the present invention comprises a flux fluid chamber containing flux having a viscosity range between about 10 centipoises and about 150 centipoises, and a flux dispense nozzle connected to the flux fluid and spraying the flux at a valve pressure range between about 1.5 psi and about 30 psi to deposit the flux on the plurality of conductive terminals. In certain embodiment of the present invention, the flux needle is used as the flux-dispensing nozzle.
Hence, the flux having a viscosity range between about 10 centipoises and about 150 centipoises is controllably sprayed on the substrate at a valve pressure range between about 1.5 psi and about 30 psi to deposit the flux on the substrate and the conductive terminals thereon. This has an advantage of significantly reducing flux residue remaining on the substrate after the high temperature solder reflow process, since the flux is mostly removed by thermal decomposition to volatile species during the high temperature solder reflow process. Thus, the present invention reduces the risk of the device""s functional failure during long-term use due to stress corrosion caused by exposure to temperature and humidity, thus achieving enhanced C4 fatigue life and reliability during production on-off cycle.
Additional advantages of the present invention will become readily apparent to those skilled in this art from the following detailed description, wherein only the preferred embodiment of the present invention is shown and described, simply by way of illustration of the best mode contemplated for carrying out the present invention. As will be realized, the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, all without departing from the present invention. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not as restrictive.